{
	"TOP_SOURCE": "user_project_wrapper",
	"TOP_LAYOUT": "$TOP_SOURCE",
	"EXTRACT_FLATGLOB": [
		""
	],
	"EXTRACT_ABSTRACT": [
		"*__fill_*",
		"*__fakediode_*",
		"*__tapvpwrvgnd_*"
	],
	"LVS_FLATTEN": [
		""
	],
	"LVS_NOFLATTEN": [
		""
	],
	"LVS_IGNORE": [
		""
	],
	"LVS_SPICE_FILES": [
		"$PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap*.spice",
		"$PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice"
	],
	"LVS_VERILOG_FILES": [
		"$UPRJ_ROOT/verilog/gl/ldpc_decoder_top.v",
		"$UPRJ_ROOT/verilog/gl/$TOP_SOURCE.v"
	],
	"LAYOUT_FILE": "$UPRJ_ROOT/gds/$TOP_LAYOUT.gds"
}
