Initial commit
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39
verilog/dv/cocotb/user_proj_tests/counter_wb/counter_wb.c
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39
verilog/dv/cocotb/user_proj_tests/counter_wb/counter_wb.c
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// SPDX-FileCopyrightText: 2023 Efabless Corporation
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <firmware_apis.h>
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void main(){
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// Enable managment gpio as output to use as indicator for finishing configuration
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ManagmentGpio_outputEnable();
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ManagmentGpio_write(0);
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enableHkSpi(0); // disable housekeeping spi
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// configure all gpios as user out then chenge gpios from 32 to 37 before loading this configurations
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GPIOs_configureAll(GPIO_MODE_USER_STD_OUT_MONITORED);
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GPIOs_loadConfigs(); // load the configuration
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User_enableIF(); // this necessary when reading or writing between wishbone and user project if interface isn't enabled no ack would be recieve and the command will be stuck
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// user la reset and wb clk
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LogicAnalyzer_outputEnable(2,1);
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// reset counter
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LogicAnalyzer_write(2,2);
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LogicAnalyzer_write(2,0);
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ManagmentGpio_write(1); // configuration finished
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// writing to any address inside user project address space would reload the counter value
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USER_writeWord(0x7,0x88);
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ManagmentGpio_write(0); // start counting from 0
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return;
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}
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63
verilog/dv/cocotb/user_proj_tests/counter_wb/counter_wb.py
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verilog/dv/cocotb/user_proj_tests/counter_wb/counter_wb.py
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# SPDX-FileCopyrightText: 2023 Efabless Corporation
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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# http://www.apache.org/licenses/LICENSE-2.0
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# SPDX-License-Identifier: Apache-2.0
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from caravel_cocotb.caravel_interfaces import test_configure
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from caravel_cocotb.caravel_interfaces import report_test
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import cocotb
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@cocotb.test()
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@report_test
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async def counter_wb(dut):
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caravelEnv = await test_configure(dut,timeout_cycles=32620)
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cocotb.log.info(f"[TEST] Start counter_wb test")
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# wait for start of sending
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await caravelEnv.release_csb()
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await caravelEnv.wait_mgmt_gpio(1)
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cocotb.log.info(f"[TEST] finish configuration")
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overwrite_val = 7 # value will be written to the counter by wishbone
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# expect value bigger than 7
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received_val = int ((caravelEnv.monitor_gpio(37,30).binstr + caravelEnv.monitor_gpio(7,0).binstr ),2)
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counter = received_val
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await cocotb.triggers.ClockCycles(caravelEnv.clk,1)
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while True: # wait until the value 1 start counting after the initial
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received_val = int ((caravelEnv.monitor_gpio(37,30).binstr + caravelEnv.monitor_gpio(7,0).binstr ),2)
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if counter == 0xFFFF: # rollover
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counter = 0
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else:
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counter +=1
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if received_val != counter:
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if received_val == overwrite_val:
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counter = received_val +1
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cocotb.log.info(f"Counter value has been overwritten by wishbone to be {received_val}")
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while True: #wait until the wishbone writing finished and the counter start running again
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received_val = int ((caravelEnv.monitor_gpio(37,30).binstr + caravelEnv.monitor_gpio(7,0).binstr ),2)
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if counter == received_val:
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break
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await cocotb.triggers.ClockCycles(caravelEnv.clk,1)
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cocotb.log.info(f"Counter value has been overwritten by wishbone to be {received_val}")
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break
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else:
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cocotb.log.error(f"Counter has wrong value before overwrite happened expected: {counter} received: {received_val}")
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await cocotb.triggers.ClockCycles(caravelEnv.clk,1)
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for i in range(100):
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if counter != int ((caravelEnv.monitor_gpio(37,30).binstr + caravelEnv.monitor_gpio(7,0).binstr ),2) :
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cocotb.log.error(f"Counter have wrong value expected = {counter} recieved = {int ((caravelEnv.monitor_gpio(37,30).binstr + caravelEnv.monitor_gpio(7,0).binstr ),2) }")
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await cocotb.triggers.ClockCycles(caravelEnv.clk,1)
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counter +=1
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21
verilog/dv/cocotb/user_proj_tests/counter_wb/counter_wb.yaml
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21
verilog/dv/cocotb/user_proj_tests/counter_wb/counter_wb.yaml
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# SPDX-FileCopyrightText: 2023 Efabless Corporation
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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# http://www.apache.org/licenses/LICENSE-2.0
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# SPDX-License-Identifier: Apache-2.0
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# Yalm file contain general design information that would mostly need to be updated in the first run only
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Tests:
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- {name: counter_wb, sim: RTL}
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