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32
verilog/dv/io_ports/Makefile
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32
verilog/dv/io_ports/Makefile
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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PWDD := $(shell pwd)
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BLOCKS := $(shell basename $(PWDD))
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# ---- Include Partitioned Makefiles ----
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CONFIG = caravel_user_project
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include $(MCW_ROOT)/verilog/dv/make/env.makefile
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include $(MCW_ROOT)/verilog/dv/make/var.makefile
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include $(MCW_ROOT)/verilog/dv/make/cpu.makefile
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include $(MCW_ROOT)/verilog/dv/make/sim.makefile
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75
verilog/dv/io_ports/io_ports.c
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75
verilog/dv/io_ports/io_ports.c
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/*
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* SPDX-FileCopyrightText: 2020 Efabless Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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* SPDX-License-Identifier: Apache-2.0
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*/
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// This include is relative to $CARAVEL_PATH (see Makefile)
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#include <defs.h>
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#include <stub.c>
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/*
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IO Test:
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- Configures MPRJ lower 8-IO pins as outputs
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- Observes counter value through the MPRJ lower 8 IO pins (in the testbench)
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*/
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void main()
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{
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/*
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IO Control Registers
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| DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
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| 3-bits | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit | 1-bit |
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Output: 0000_0110_0000_1110 (0x1808) = GPIO_MODE_USER_STD_OUTPUT
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| DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
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| 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
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Input: 0000_0001_0000_1111 (0x0402) = GPIO_MODE_USER_STD_INPUT_NOPULL
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| DM | VTRIP | SLOW | AN_POL | AN_SEL | AN_EN | MOD_SEL | INP_DIS | HOLDH | OEB_N | MGMT_EN |
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| 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
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*/
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/* Set up the housekeeping SPI to be connected internally so */
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/* that external pin changes don't affect it. */
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// reg_spi_enable = 1;
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// reg_spimaster_cs = 0x10001;
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// reg_spimaster_control = 0x0801;
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// reg_spimaster_control = 0xa002; // Enable, prescaler = 2,
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// connect to housekeeping SPI
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// Connect the housekeeping SPI to the SPI master
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// so that the CSB line is not left floating. This allows
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// all of the GPIO pins to be used for user functions.
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// Configure lower 8-IOs as user output
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// Observe counter value in the testbench
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reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_2 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_3 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_4 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_6 = GPIO_MODE_USER_STD_OUTPUT;
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reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT;
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/* Apply configuration */
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reg_mprj_xfer = 1;
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while (reg_mprj_xfer == 1);
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}
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267
verilog/dv/io_ports/io_ports_tb.v
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267
verilog/dv/io_ports/io_ports_tb.v
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// SPDX-FileCopyrightText: 2020 Efabless Corporation
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// SPDX-License-Identifier: Apache-2.0
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`default_nettype none
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`timescale 1 ns / 1 ps
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module io_ports_tb;
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reg clock;
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reg RSTB;
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reg CSB;
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reg power1, power2;
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reg power3, power4;
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wire gpio;
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wire [37:0] mprj_io;
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wire [7:0] mprj_io_0;
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assign mprj_io_0 = mprj_io[7:0];
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// assign mprj_io_0 = {mprj_io[8:4],mprj_io[2:0]};
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assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
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// assign mprj_io[3] = 1'b1;
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// External clock is used by default. Make this artificially fast for the
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// simulation. Normally this would be a slow clock and the digital PLL
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// would be the fast clock.
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always #12.5 clock <= (clock === 1'b0);
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initial begin
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clock = 0;
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end
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`ifdef ENABLE_SDF
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initial begin
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$sdf_annotate("../../../sdf/user_proj_example.sdf", uut.mprj) ;
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$sdf_annotate("../../../sdf/user_project_wrapper.sdf", uut.mprj.mprj) ;
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$sdf_annotate("../../../mgmt_core_wrapper/sdf/DFFRAM.sdf", uut.soc.DFFRAM_0) ;
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$sdf_annotate("../../../mgmt_core_wrapper/sdf/mgmt_core.sdf", uut.soc.core) ;
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$sdf_annotate("../../../caravel/sdf/housekeeping.sdf", uut.housekeeping) ;
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$sdf_annotate("../../../caravel/sdf/chip_io.sdf", uut.padframe) ;
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$sdf_annotate("../../../caravel/sdf/mprj_logic_high.sdf", uut.mgmt_buffers.mprj_logic_high_inst) ;
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$sdf_annotate("../../../caravel/sdf/mprj2_logic_high.sdf", uut.mgmt_buffers.mprj2_logic_high_inst) ;
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$sdf_annotate("../../../caravel/sdf/mgmt_protect_hv.sdf", uut.mgmt_buffers.powergood_check) ;
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$sdf_annotate("../../../caravel/sdf/mgmt_protect.sdf", uut.mgmt_buffers) ;
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$sdf_annotate("../../../caravel/sdf/caravel_clocking.sdf", uut.clocking) ;
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$sdf_annotate("../../../caravel/sdf/digital_pll.sdf", uut.pll) ;
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$sdf_annotate("../../../caravel/sdf/xres_buf.sdf", uut.rstb_level) ;
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$sdf_annotate("../../../caravel/sdf/user_id_programming.sdf", uut.user_id_value) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_bidir_1[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_bidir_1[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_bidir_2[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_bidir_2[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_bidir_2[2] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[2] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[3] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[4] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[5] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[6] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[7] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[8] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[9] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1[10] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1a[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1a[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1a[2] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1a[3] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1a[4] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_1a[5] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[2] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[3] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[4] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[5] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[6] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[7] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[8] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[9] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[10] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[11] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[12] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[13] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[14] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_control_block.sdf", uut.\gpio_control_in_2[15] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.\gpio_defaults_block_0[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.\gpio_defaults_block_0[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.\gpio_defaults_block_2[0] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.\gpio_defaults_block_2[1] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.\gpio_defaults_block_2[2] ) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_5) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_6) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_7) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_8) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_9) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_10) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_11) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_12) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_13) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_14) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_15) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_16) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_17) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_18) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_19) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_20) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_21) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_22) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_23) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_24) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_25) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_26) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_27) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_28) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_29) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_30) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_31) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_32) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_33) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_34) ;
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$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_35) ;
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||||
$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_36) ;
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||||
$sdf_annotate("../../../caravel/sdf/gpio_defaults_block.sdf", uut.gpio_defaults_block_37) ;
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end
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`endif
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initial begin
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$dumpfile("io_ports.vcd");
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$dumpvars(0, io_ports_tb);
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// Repeat cycles of 1000 clock edges as needed to complete testbench
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repeat (25) begin
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repeat (1000) @(posedge clock);
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// $display("+1000 cycles");
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end
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$display("%c[1;31m",27);
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`ifdef GL
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$display ("Monitor: Timeout, Test Mega-Project IO Ports (GL) Failed");
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`else
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$display ("Monitor: Timeout, Test Mega-Project IO Ports (RTL) Failed");
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`endif
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$display("%c[0m",27);
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$finish;
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end
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initial begin
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||||
// Observe Output pins [7:0]
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wait(mprj_io_0 == 8'h01);
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wait(mprj_io_0 == 8'h02);
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wait(mprj_io_0 == 8'h03);
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wait(mprj_io_0 == 8'h04);
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||||
wait(mprj_io_0 == 8'h05);
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wait(mprj_io_0 == 8'h06);
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wait(mprj_io_0 == 8'h07);
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wait(mprj_io_0 == 8'h08);
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wait(mprj_io_0 == 8'h09);
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wait(mprj_io_0 == 8'h0A);
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wait(mprj_io_0 == 8'hFF);
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wait(mprj_io_0 == 8'h00);
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||||
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||||
`ifdef GL
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$display("Monitor: Test 1 Mega-Project IO (GL) Passed");
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||||
`else
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$display("Monitor: Test 1 Mega-Project IO (RTL) Passed");
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||||
`endif
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||||
$finish;
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||||
end
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||||
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||||
initial begin
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||||
RSTB <= 1'b0;
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||||
CSB <= 1'b1; // Force CSB high
|
||||
#2000;
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||||
RSTB <= 1'b1; // Release reset
|
||||
#3_00_000;
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CSB = 1'b0; // CSB can be released
|
||||
end
|
||||
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||||
initial begin // Power-up sequence
|
||||
power1 <= 1'b0;
|
||||
power2 <= 1'b0;
|
||||
power3 <= 1'b0;
|
||||
power4 <= 1'b0;
|
||||
#100;
|
||||
power1 <= 1'b1;
|
||||
#100;
|
||||
power2 <= 1'b1;
|
||||
#100;
|
||||
power3 <= 1'b1;
|
||||
#100;
|
||||
power4 <= 1'b1;
|
||||
end
|
||||
|
||||
always @(mprj_io) begin
|
||||
#1 $display("MPRJ-IO state = %b ", mprj_io[7:0]);
|
||||
end
|
||||
|
||||
wire flash_csb;
|
||||
wire flash_clk;
|
||||
wire flash_io0;
|
||||
wire flash_io1;
|
||||
|
||||
wire VDD3V3;
|
||||
wire VDD1V8;
|
||||
wire VSS;
|
||||
|
||||
assign VDD3V3 = power1;
|
||||
assign VDD1V8 = power2;
|
||||
assign VSS = 1'b0;
|
||||
|
||||
caravel uut (
|
||||
.vddio (VDD3V3),
|
||||
.vddio_2 (VDD3V3),
|
||||
.vssio (VSS),
|
||||
.vssio_2 (VSS),
|
||||
.vdda (VDD3V3),
|
||||
.vssa (VSS),
|
||||
.vccd (VDD1V8),
|
||||
.vssd (VSS),
|
||||
.vdda1 (VDD3V3),
|
||||
.vdda1_2 (VDD3V3),
|
||||
.vdda2 (VDD3V3),
|
||||
.vssa1 (VSS),
|
||||
.vssa1_2 (VSS),
|
||||
.vssa2 (VSS),
|
||||
.vccd1 (VDD1V8),
|
||||
.vccd2 (VDD1V8),
|
||||
.vssd1 (VSS),
|
||||
.vssd2 (VSS),
|
||||
.clock (clock),
|
||||
.gpio (gpio),
|
||||
.mprj_io (mprj_io),
|
||||
.flash_csb(flash_csb),
|
||||
.flash_clk(flash_clk),
|
||||
.flash_io0(flash_io0),
|
||||
.flash_io1(flash_io1),
|
||||
.resetb (RSTB)
|
||||
);
|
||||
|
||||
spiflash #(
|
||||
.FILENAME("io_ports.hex")
|
||||
) spiflash (
|
||||
.csb(flash_csb),
|
||||
.clk(flash_clk),
|
||||
.io0(flash_io0),
|
||||
.io1(flash_io1),
|
||||
.io2(), // not used
|
||||
.io3() // not used
|
||||
);
|
||||
|
||||
endmodule
|
||||
`default_nettype wire
|
||||
Reference in New Issue
Block a user