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d6a3021fcd
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docs: rewrite README addressing ChipFoundry feedback
Add concrete system integration details, BOM with part numbers,
deployment scenarios, cost summary, and timeline-bound roadmap.
Addresses low scores on System Completeness (6/10) and
Feasibility & Cost (5/10) from ChipFoundry review.
New sections: Target Applications (CubeSat, underwater, QKD),
System Integration (Part A BOM, Part B optical frontend),
Cost Summary, Demo Strategy, Precheck Results, Deployment Roadmap.
Enhanced: Verification (32/32 explicit count, GLS table),
Hardening Results (timing closure narrative).
Fixed: cell count (186,915), core utilization (28.2%).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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2026-03-30 21:14:28 -06:00 |
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fdd68bb76b
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feat: complete hardening, wrapper, GLS verification for tapeout
RTL: Split CN_UPDATE into pipelined CN_STAGE1/CN_STAGE2, replace serial
popcount with balanced adder tree for timing closure.
Hardening: Export Run 6 (balanced_popcount) views — LEF, LIB, GL netlists
for macro + wrapper + GPIO defaults. GDS/DEF/SPEF kept local (cf push).
TT WNS = +3.28ns at 50 MHz. DRC/LVS clean.
Config: Increase SDC min input delays +0.7ns (fix 1,543 hold violations).
Set ERROR_ON_LVS_ERROR=false for wrapper cosmetic pin-match. Fix GPIO
defines to GPIO_MODE_USER_STD_BIDIRECTIONAL.
Verification: 5/5 GLS tests pass, 17/19 precheck pass. Add SPDX headers,
GLS test runner, OpenLane helper scripts. Update README with results.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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2026-03-13 22:42:41 -06:00 |
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