Commit Graph

12 Commits

Author SHA1 Message Date
cah
fdd68bb76b feat: complete hardening, wrapper, GLS verification for tapeout
RTL: Split CN_UPDATE into pipelined CN_STAGE1/CN_STAGE2, replace serial
popcount with balanced adder tree for timing closure.

Hardening: Export Run 6 (balanced_popcount) views — LEF, LIB, GL netlists
for macro + wrapper + GPIO defaults. GDS/DEF/SPEF kept local (cf push).
TT WNS = +3.28ns at 50 MHz. DRC/LVS clean.

Config: Increase SDC min input delays +0.7ns (fix 1,543 hold violations).
Set ERROR_ON_LVS_ERROR=false for wrapper cosmetic pin-match. Fix GPIO
defines to GPIO_MODE_USER_STD_BIDIRECTIONAL.

Verification: 5/5 GLS tests pass, 17/19 precheck pass. Add SPDX headers,
GLS test runner, OpenLane helper scripts. Update README with results.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-03-13 22:42:41 -06:00
cah
1678f6b7de feat: add LDPC demo firmware and cocotb test
Demo firmware runs clean decode + noisy decode (vector 0) and reports
pass/fail on GPIO[7:0]. All 5 cocotb tests pass: ldpc_basic, ldpc_noisy,
ldpc_max_iter, ldpc_back_to_back, and ldpc_demo.

Also adds .cf/project.json with GPIO configuration.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 22:28:46 -07:00
cah
ce61fd1e85 fix: rewrite sat_add/sat_sub for Yosys compatibility
Use overflow detection instead of $signed comparison.
Use function assignment instead of return statements.
Yosys parser can't handle return with complex concatenation.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 21:18:09 -07:00
cah
f2e419e25d fix: flatten LLR interface to packed vector for Yosys compatibility
Yosys doesn't support unpacked array ports. Changed llr_in/llr_input
from `logic signed [Q-1:0] llr[N]` to `logic [N*Q-1:0] llr` packed
vector. Also fixed blocking assignment in INIT loops (Verilator
BLKLOOPINIT requirement).

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 21:07:29 -07:00
cah
c74ab93ae5 test: add noisy, max_iter, and back-to-back cocotb tests
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 21:04:51 -07:00
cah
90bd916ee3 fix: refactor cn_min_sum task for iverilog compatibility
Replace unpacked array parameter with 8 individual ports.
Icarus Verilog (used by cocotb) doesn't support unpacked
dimensions in task/function ports.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 20:54:13 -07:00
cah
885554102f test: add cocotb LDPC basic decode test with firmware
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 20:47:34 -07:00
cah
412c51a632 fix: three RTL bugs found by vector-driven testbench
- Magnitude overflow for -32 in cn_min_sum (clamp to 31)
- Converged flag cleared prematurely in IDLE (move to INIT)
- msg_cn2vn zeroing race in first iteration (bypass old_msg read)

All 20 test vectors now pass bit-exact against Python model.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 19:55:42 -07:00
cah
55eb487f5f fix: set unconnected VN->CN messages to +MAX in min-sum
Prevents magnitude 0 from unconnected columns dominating the
minimum computation and zeroing all CN->VN messages.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 19:06:38 -07:00
cah
5b92587f51 feat: add generated test vector data for cocotb and firmware
Add test_data.py (cocotb Python module) and test_vectors.h (C header)
with 20 test vectors from the Python behavioral model. LLR data is
packed 5 per 32-bit word matching the wishbone interface format.
11 converged vectors for positive testing, 9 non-converged for
negative testing.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 18:37:37 -07:00
cah
5d615876ae feat: integrate LDPC decoder into Caravel wrapper
- Copy ldpc_decoder_core.sv and wishbone_interface.sv from standalone RTL
- Create Caravel-adapted ldpc_decoder_top.sv with USE_POWER_PINS,
  32-bit address (lower 8 bits passed through), and wb_sel_i port
- Replace user_proj_example in user_project_wrapper.v with LDPC decoder
  instantiation, active-high to active-low reset inversion, and tie-offs
  for unused outputs (la_data_out, io_out, io_oeb, user_irq[2:1])
- Update includes.rtl.caravel_user_project with LDPC RTL file list
- Fix invalid hex literal in VERSION_ID (0xLD -> 0x1D)

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-25 18:22:45 -07:00
2ba96a115d Initial commit 2026-02-23 20:42:11 -07:00