Corey Hahn
1fcdc1dd89
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Re-hardened wrapper with chipfoundry-cli (LibreLane) per contest item #3. Macro ldpc_decoder_top unchanged (Run 6 / antenna_iterative golden) — wrapper config has SYNTH_ELABORATE_ONLY=true and reuses macro as a hardened black box. Results vs wrapper_v4 baseline: setup violations: 3402 → 0 hold violations: 13006 → 0 antenna nets: 1179 → 23 Magic + KLayout DRC: clean power-grid: clean LVS pin-match: 208 (cosmetic, vssd2 + constant-tied outputs) Verification: cf precheck: 17/19 pass (FEOL SIGSEGV + LVS pin-match pre-existing accepted) cf verify ldpc_basic --sim gl: PASS (GPIO=0xAB, decode success) GDS/DEF/SPEF kept local for cf push. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
17 lines
3.8 KiB
Plaintext
17 lines
3.8 KiB
Plaintext
┏━━━━━━━━━━━━━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━━┳━━━━━━━━━━┳━━━━━━━━━━━┓
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┃ ┃ Hold ┃ Reg to ┃ ┃ ┃ of which ┃ Setup ┃ Reg to ┃ ┃ Setup ┃ of which ┃ ┃ ┃
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┃ ┃ Worst ┃ Reg ┃ ┃ Hold Vio ┃ reg to ┃ Worst ┃ Reg ┃ ┃ Vio ┃ reg to ┃ Max Cap ┃ Max Slew ┃
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┃ Corner/Group ┃ Slack ┃ Paths ┃ Hold TNS ┃ Count ┃ reg ┃ Slack ┃ Paths ┃ Setup TNS ┃ Count ┃ reg ┃ Violati… ┃ Violatio… ┃
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┡━━━━━━━━━━━━━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━━╇━━━━━━━━━━╇━━━━━━━━━━━┩
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│ Overall │ -2.4388 │ 0.1925 │ -1278.2… │ 13006 │ 0 │ -4.0393 │ -4.0393 │ -3552.50… │ 3402 │ 3402 │ 668 │ 5912 │
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│ nom_tt_025C_1v80 │ -1.5758 │ 0.4600 │ -1071.4… │ 1524 │ 0 │ 7.1896 │ 16.3788 │ 0.0000 │ 0 │ 0 │ 151 │ 1279 │
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│ nom_ss_100C_1v60 │ -2.1087 │ 1.1548 │ -869.62… │ 1312 │ 0 │ -2.8806 │ -2.8806 │ -1789.44… │ 1447 │ 1447 │ 581 │ 4785 │
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│ nom_ff_n40C_1v95 │ -1.2002 │ 0.2046 │ -905.00… │ 1527 │ 0 │ 8.4706 │ 19.6251 │ 0.0000 │ 0 │ 0 │ 25 │ 269 │
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│ min_tt_025C_1v80 │ -1.3484 │ 0.4405 │ -844.54… │ 1508 │ 0 │ 7.5005 │ 16.4864 │ 0.0000 │ 0 │ 0 │ 81 │ 657 │
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│ min_ss_100C_1v60 │ -1.7615 │ 1.1207 │ -551.81… │ 1138 │ 0 │ -1.3140 │ -1.3140 │ -216.4170 │ 414 │ 414 │ 456 │ 3615 │
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│ min_ff_n40C_1v95 │ -1.0507 │ 0.1925 │ -754.74… │ 1523 │ 0 │ 8.7602 │ 19.7104 │ 0.0000 │ 0 │ 0 │ 7 │ 68 │
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│ max_tt_025C_1v80 │ -1.7871 │ 0.4749 │ -1278.2… │ 1529 │ 0 │ 6.8396 │ 16.2764 │ 0.0000 │ 0 │ 0 │ 198 │ 1898 │
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│ max_ss_100C_1v60 │ -2.4388 │ 1.1712 │ -1173.1… │ 1412 │ 0 │ -4.0393 │ -4.0393 │ -3552.50… │ 1541 │ 1541 │ 668 │ 5912 │
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│ max_ff_n40C_1v95 │ -1.3484 │ 0.2141 │ -1036.5… │ 1533 │ 0 │ 8.0775 │ 19.5515 │ 0.0000 │ 0 │ 0 │ 41 │ 580 │
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└──────────────────────┴──────────┴──────────┴──────────┴──────────┴──────────┴───────────┴──────────┴───────────┴──────────┴───────────┴──────────┴───────────┘
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