Files
chip_ignite/verilog/dv/cocotb/design_info.yaml
2026-02-23 20:42:11 -07:00

10 lines
218 B
YAML

CARAVEL_ROOT: /usr/caravel_user_project/caravel
MCW_ROOT: /usr/caravel_user_project/mgmt_core_wrapper
PDK: sky130A
PDK_ROOT: /usr/pdk
USER_PROJECT_ROOT: /usr/caravel_user_project
caravan: false
clk: 25
emailto:
- null