From d39b133c76f75d4271d5125c2c3d3621f755b6ea Mon Sep 17 00:00:00 2001 From: cah Date: Tue, 24 Feb 2026 22:47:49 -0700 Subject: [PATCH] docs: frame sync runs as PicoRV32 firmware, zero extra RTL Reuses existing syndrome_wt register and converged flag. No additional hardware needed on the ASIC. Co-Authored-By: Claude Opus 4.6 --- docs/project_report.md | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/docs/project_report.md b/docs/project_report.md index 2bc8f0c..91e54f0 100644 --- a/docs/project_report.md +++ b/docs/project_report.md @@ -277,13 +277,33 @@ A valid codeword satisfies all parity checks (syndrome weight = 0). A random 256 If the offset drifts (e.g., clock slip), the receiver first searches locally within +/-16 positions of the last known offset. Only if that fails does it fall back to full acquisition. Local re-sync is nearly instant since it screens ~33 candidates instead of 256. -### 7.4 RTL Implications +### 7.4 Implementation: PicoRV32 Firmware (Zero Extra RTL) -The frame sync logic is simple hardware: -- **Syndrome screening:** reuses the same syndrome checker already in the decoder. Just feed it hard decisions from different offsets. -- **State machine:** ACQUIRE -> LOCKED -> RESYNC (on decode failure) -> local search -> fallback to ACQUIRE -- **No extra memory:** operates on the incoming LLR stream, one window at a time -- **Firmware option:** could also run entirely in PicoRV32 firmware if area is tight, since it's not time-critical (only runs once at startup or after link loss) +Frame sync runs entirely in firmware on the Caravel PicoRV32. No additional hardware is needed -- the decoder already exposes everything the algorithm requires: + +- **SYNDROME_WT register (0x5C):** read back syndrome weight after a 1-iteration "quick check" +- **STATUS.converged flag:** tells firmware whether a full decode succeeded +- **LLR_IN port:** firmware writes LLRs at each candidate offset alignment + +The firmware loop: + +```c +for (offset = 0; offset < 256; offset++) { + write_llrs(stream + offset); // load 256 LLRs at this alignment + start_decode(max_iter=1); // 1 iteration = quick syndrome screen + if (read_syndrome_wt() < 50) { // promising candidate + start_decode(max_iter=30); // full decode + if (read_converged()) // confirm with next 2 frames + if (confirm_next_frames()) return offset; + } +} +``` + +**Why firmware, not a hardware FSM:** +- Frame sync only runs at link startup or after losing lock -- not on the data path +- PicoRV32 at 150 MHz screens all 256 offsets in well under 1 ms +- Thresholds and confirmation count are tunable without a respin +- Saves ~0.05 mm^2 that would otherwise go to a rarely-used state machine ---