docs: add project report with architecture diagrams

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Comprehensive report for FPGA partner covering:
- System architecture and channel model
- LDPC decoder hardware blocks
- Code optimization journey (5.23 -> 1.03 photons/slot)
- SC-LDPC threshold saturation results
- RTL implementation plan and area estimates

Includes 10 figures: system architecture, channel model,
degree distributions, FER curves, threshold progressions.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

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2026-02-24 21:45:35 -07:00

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