Add tb/tb_ldpc_decoder.sv with Wishbone read/write tasks, version register test, and all-zero codeword decode test. Add tb/Makefile with lint and sim targets. Fix two RTL bugs found during testbench bring-up: - ldpc_decoder_core.sv: skip unconnected H_BASE columns (shift=-1) in LAYER_READ, LAYER_WRITE, and SYNDROME states to prevent out-of-bounds array access and belief corruption - ldpc_decoder_core.sv: fix syndrome_ok timing race by adding SYNDROME_DONE state so the registered result is available before the early-termination decision - wishbone_interface.sv: fix VERSION_ID typo (0xLD01 -> 0x1D01) Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
29 lines
836 B
Makefile
29 lines
836 B
Makefile
RTL_DIR = ../rtl
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RTL_FILES = $(RTL_DIR)/ldpc_decoder_top.sv \
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$(RTL_DIR)/ldpc_decoder_core.sv \
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$(RTL_DIR)/wishbone_interface.sv
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.PHONY: lint sim clean
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lint:
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verilator --lint-only -Wall \
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-Wno-WIDTHEXPAND -Wno-WIDTHTRUNC -Wno-CASEINCOMPLETE \
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-Wno-BLKSEQ -Wno-BLKLOOPINIT -Wno-UNUSEDSIGNAL -Wno-UNUSEDPARAM \
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--unroll-count 1024 \
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$(RTL_FILES) --top-module ldpc_decoder_top
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sim: obj_dir/Vtb_ldpc_decoder
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./obj_dir/Vtb_ldpc_decoder
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obj_dir/Vtb_ldpc_decoder: tb_ldpc_decoder.sv $(RTL_FILES)
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verilator --binary --timing --trace \
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-o Vtb_ldpc_decoder \
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-Wno-WIDTHEXPAND -Wno-WIDTHTRUNC -Wno-CASEINCOMPLETE \
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-Wno-BLKSEQ -Wno-BLKLOOPINIT -Wno-UNUSEDSIGNAL -Wno-UNUSEDPARAM \
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--unroll-count 1024 \
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tb_ldpc_decoder.sv $(RTL_FILES) \
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--top-module tb_ldpc_decoder
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clean:
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rm -rf obj_dir *.vcd
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