cah 87b84f8c75 docs: add project report with architecture diagrams ...

Comprehensive report for FPGA partner covering:
- System architecture and channel model
- LDPC decoder hardware blocks
- Code optimization journey (5.23 -> 1.03 photons/slot)
- SC-LDPC threshold saturation results
- RTL implementation plan and area estimates

Includes 10 figures: system architecture, channel model,
degree distributions, FER curves, threshold progressions.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

2026-02-24 21:45:35 -07:00

..

plots

docs: add project report with architecture diagrams

2026-02-24 21:45:35 -07:00

analysis_results.json

Fix matrix rank issues and run all code analyses

2026-02-24 04:56:37 -07:00

de_results_z128.json

data: add Z=128 pipeline results and comparison plots

2026-02-24 17:08:07 -07:00

de_results.json

data: add density evolution optimization results

2026-02-24 06:07:14 -07:00

sc_ldpc_results.json

data: add SC-LDPC results and comprehensive comparison plots

2026-02-24 18:35:50 -07:00