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cah 74baf3cd05 feat: add test vector generation for RTL verification

Improve generate_test_vectors() to use mixed SNR levels (high SNR for
first half, nominal for second half) ensuring a mix of converged and
non-converged test cases. Add gen_firmware_vectors.py converter that
reads test_vectors.json and produces packed LLR data matching the
RTL wishbone interface format (5 LLRs per 32-bit word, 6-bit two's
complement).

Generated 20 vectors: 11 converged, 9 non-converged.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

2026-02-25 18:36:26 -07:00

data

feat: add test vector generation for RTL verification

2026-02-25 18:36:26 -07:00

docs

docs: add detailed implementation plan for ChipFoundry contest

2026-02-25 18:10:38 -07:00

model

feat: add test vector generation for RTL verification

2026-02-25 18:36:26 -07:00

rtl

Update RTL base matrix to match working Python model