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cah d39b133c76 docs: frame sync runs as PicoRV32 firmware, zero extra RTL

Reuses existing syndrome_wt register and converged flag.
No additional hardware needed on the ASIC.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

2026-02-24 22:47:49 -07:00

data

docs: add project report with architecture diagrams

2026-02-24 21:45:35 -07:00

docs

docs: frame sync runs as PicoRV32 firmware, zero extra RTL

2026-02-24 22:47:49 -07:00

model

docs: add project report with architecture diagrams

2026-02-24 21:45:35 -07:00

rtl

Update RTL base matrix to match working Python model

2026-02-23 21:56:48 -07:00

.gitignore

chore: add .gitignore with worktree and Python exclusions

2026-02-24 05:14:51 -07:00

CLAUDE.md

Initial LDPC optical decoder project scaffold

2026-02-23 21:47:40 -07:00