1 Commits

Author SHA1 Message Date
cah
b7b76da46e Fix encoder and decoder - working LDPC simulation
- Fixed cyclic shift convention (QC-LDPC P_s is left shift, not right)
- Fixed encoder to solve rows sequentially (row 0 first for p1, then 1-6)
- Fixed decoder to only gather connected columns per CN (staircase has dc=2-3)
- Fixed LLR sign convention: positive = bit 0 more likely
- Decoder validates at lam_s >= 4 photons/slot (~90% frame success)

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-02-23 21:56:15 -07:00